Via-in-Pad Design: When It Helps and When It Hurts Your PCBA Assembly

Via-in-pad — placing a plated through-hole or microvia directly inside a component pad — is one of the most powerful techniques in modern PCB design. It is also one of the most commonly misused. Done right, it unlocks dense BGA fanout, lower-inductance power delivery, and cleaner RF routing. Done wrong, it produces field failures, silent solder voids, missing components after reflow, and assembly yields that mysteriously collapse.

This guide explains when via-in-pad (VIP) is the right tool, when it actively hurts your assembly, and how to specify it correctly so the board you receive matches the design intent. Linked Electronics Co., Limited supports via-in-pad fabrication across our FR4, HDI, and rigid-flex product lines, with filling, planarization, and capping options on every standard process route.

What Via-in-Pad Actually Is

In conventional design, a via is placed beside the pad and connected to it with a short trace ("dog-bone fanout"). Via-in-pad eliminates that trace: the drilled hole lands directly inside the SMD pad. The connection from pad to inner layer is vertical, with no horizontal routing required.

This sounds trivial. It is not. The moment you put a hole inside a soldering pad, you create a path for molten solder to flow during reflow — out of the joint, down the via barrel, and onto whatever copper sits below. The result is variously called solder wicking, solder robbing, or via leaching, and it produces underfilled joints, head-in-pillow defects on BGAs, and components that lift off the board entirely.

Every reputable via-in-pad construction therefore requires a secondary process — the via must be filled with a non-conductive epoxy or conductive copper, planarized, and capped with copper plating so the surface looks like a solid pad to the solder paste and component. Without that fill-and-cap step, via-in-pad is a defect waiting to happen.

When Via-in-Pad Genuinely Helps

BGA and QFN Fanout at Fine Pitch

The dominant reason engineers reach for via-in-pad is BGA fanout. A 0.8mm-pitch BGA can usually be fanned out with dog-bone vias between the balls. A 0.65mm-pitch BGA is marginal. Below 0.5mm pitch — and modern processors, FPGAs, and SoCs commonly run at 0.4mm or 0.35mm — there is simply no room between balls to route a trace to an external via.

Via-in-pad solves this directly. Every inner-row ball gets its own via inside its pad, and the inner layers can be used immediately for routing. For a 0.4mm-pitch 484-ball BGA, the difference between dog-bone fanout and via-in-pad can be the difference between a feasible 8-layer board and an impossible 12-layer board. Linked Electronics Co., Limited routinely supports VIP on BGAs down to 0.35mm pitch with appropriate microvia and filling specification.

QFN and DFN Thermal Pads

The large thermal pad on the underside of a QFN or DFN package needs to dump heat into the inner ground plane or to the opposite-side copper. Via-in-pad — a cluster of small vias inside the thermal pad — is the standard technique. The vias must be filled and capped, or solder paste will be drawn into them during reflow, leaving a void under the package and degrading both the thermal path and the mechanical bond.

Low-Inductance Power and Ground Connections

For high-current power delivery to a processor or FPGA, the inductance of the bypass-cap-to-power-pin loop matters at switching frequencies. A dog-bone via adds a few hundred picohenries of loop inductance. Via-in-pad on both the cap pad and the device power pad shortens the loop dramatically, reducing power-supply noise and improving rail integrity at GHz switching speeds. This is why nearly every modern smartphone, AI accelerator, and high-end server CPU board uses via-in-pad on decoupling capacitors near critical loads.

RF Performance

At microwave frequencies, every discontinuity in a signal path radiates and reflects. A dog-bone stub off a transmission line creates a small open-stub resonator that produces a notch in the frequency response. Via-in-pad eliminates the stub: the signal goes straight down through the board with no detour. For 24 GHz radar, 28 GHz 5G, and millimeter-wave designs, via-in-pad on signal launches is increasingly standard practice.

Rigid-Flex Transition Zones

In rigid-flex constructions, the transition between rigid and flex sections is mechanically and electrically sensitive. Via-in-pad in transition pads reduces stress concentrations and improves long-term reliability across flexing cycles. Linked Electronics Co., Limited applies via-in-pad fill on rigid-flex stack-ups whenever the transition pad carries a critical signal or power rail.

When Via-in-Pad Hurts

Without Fill and Cap — Always a Problem

The single most common via-in-pad mistake is specifying an unfilled, uncapped via on a soldering pad. Solder paste prints over the pad, the via, and the surrounding solder mask. During reflow, the molten solder finds the lower-resistance path down the via and out the bottom. The component lifts, the joint voids, or both. On a BGA, the failure is invisible until X-ray inspection — and by then thousands of boards may have shipped.

If you do not specify filled and capped vias explicitly in your fabrication notes, you are gambling on whatever the manufacturer defaults to. The Linked Electronics Co., Limited default is to flag any unfilled via inside a pad on incoming Gerber review and request clarification before fabrication starts.

Small, Simple Boards Where Dog-Bone Works Fine

VIP costs more — filling, planarization, and capping add real money per square decimetre. On a 2-layer or 4-layer board with 0.5mm-pitch or coarser components, dog-bone fanout works perfectly well and costs nothing extra. Adding via-in-pad here is pure cost without benefit. The temptation to "make it cleaner" with VIP on simple designs is a common over-specification trap.

Press-Fit Connector Holes

Press-fit connectors require a specific copper barrel geometry to achieve the gas-tight interference fit. Filling and capping these holes destroys the press-fit zone. Any plated through-hole intended for press-fit connectors must be left open and unfilled, even if it lands inside or adjacent to other pad features.

Test Points and Probe Pads

If a test probe needs to make contact for in-circuit test, a filled and capped via covers the conductive surface with a thin copper cap that may not survive repeated probing. For dedicated test points, use a normal solid pad rather than a capped via.

Cost-Sensitive High-Volume Builds

For a consumer product shipping in millions, the unit cost of via-fill is multiplied by enormous volume. If the design can be re-routed to avoid VIP without exploding layer count or compromising electrical performance, that re-routing typically saves more than its engineering cost. Discuss alternatives with the Linked Electronics Co., Limited engineering team before defaulting to VIP for volume production.

How Filled and Capped Vias Are Actually Made

Specifying "via-in-pad, filled and capped" is shorthand for a multi-step process. Understanding the steps helps when reading fabrication quotations and process documents.

1. Via drilling and plating — Mechanical or laser drilling creates the hole, which is then copper plated to the standard barrel thickness (typically 25µm for Class 3, 20µm for Class 2).
2. Fill material selection — Two main fill types are used. Non-conductive epoxy fill is the standard, lowest-cost choice and works for the vast majority of via-in-pad applications. Conductive copper fill (electroplated copper filling the entire via) is used when the via must carry significant current or thermal load, and is essential for stacked microvia structures in HDI.
3. Fill application — The fill material is forced into the via under vacuum or pressure, ensuring no air pockets remain. Voids in the fill cause outgassing during reflow and reintroduce the original problem.
4. Curing and planarization — Epoxy fill is thermally cured, then the surface is mechanically planarized flat with the surrounding copper. Any high or low spot at this stage will telegraph through to the final pad surface.
5. Copper cap plating — A layer of copper is electroplated over the planarized surface, creating a continuous copper pad that fully covers the filled via. Typical cap thickness is 15–25µm.
6. Surface finish — The final surface finish (ENIG, OSP, etc.) is then applied to the capped surface in the normal way.

The result is a pad that looks and behaves like a normal SMD pad. Solder paste prints on it, the component sits on it, reflow proceeds normally, and there is no path for solder to wick away.

Cost Implications

Via-in-pad with fill and cap adds cost in three places:

• Materials — epoxy fill or extra plating copper
• Process time — fill, cure, planarization, and cap plating each add cycle time
• Inspection — every filled via should be coupon-sectioned and checked for voids; capping coverage is verified by AOI

Typical price impact seen at Linked Electronics Co., Limited:

• Non-conductive epoxy fill + cap — adds roughly 15–30% to the per-square-decimetre fabrication cost, depending on via count
• Conductive copper fill + cap — adds roughly 35–60% to the cost, and extends lead time by 2–4 days
• HDI with stacked microvias and copper fill — premium varies widely with structure complexity; quote per design

For most projects, the cost is justified by the layer-count reduction or yield improvement that VIP delivers. For projects where it is not justified, this is the right moment to revisit the layout.

Design Guidelines for Via-in-Pad

If you have decided VIP is the right approach, follow these guidelines to keep fabrication straightforward and yield high:

• Use the smallest via that meets the electrical requirement. Smaller vias are faster to fill, less prone to voiding, and easier to cap flat. Typical VIP via diameters are 0.2–0.3mm finished hole for mechanical drilling, or 0.1–0.15mm for laser microvias.
• Specify the fill type explicitly in your fabrication notes — "non-conductive epoxy fill, copper capped, planarized flat" or "conductive copper fill, copper capped, IPC-4761 Type VII."
• Reference IPC-4761 via protection types for unambiguous communication. Type VI is filled and capped non-conductive; Type VII is filled and capped conductive.
• Avoid mixing VIP and non-VIP styles arbitrarily. If only a small number of pads need VIP, group them together where possible — production setup is the same per panel regardless of count.
• Provide a clear pad-to-via mapping in the Gerber. Ambiguous overlap between pad layer and drill layer causes engineering questions that delay quote and fabrication.
• Specify capping copper thickness if it matters for current carrying — 15µm is standard, 25µm is available on request.
• Plan for inspection access. Designs that allow microsection coupons through representative VIP structures speed up Class 3 acceptance.

Linked Electronics Co., Limited reviews every Gerber set for VIP compliance before quoting — incomplete VIP specifications are flagged and clarified rather than guessed.

IPC-4761 Via Protection Types — Quick Reference

IPC-4761 defines seven via protection categories. The ones most relevant to via-in-pad design are:

When in doubt, specify "IPC-4761 Type VI" — it covers the great majority of via-in-pad needs and is universally understood by experienced fabricators.

Frequently Asked Questions

Can I use via-in-pad without filling, if I am careful?

Not reliably. Even with optimised stencil design, low-volume paste, and a tightly controlled reflow profile, an open via inside a soldering pad will produce wicking defects at some rate. Yield may look acceptable on prototype boards and collapse in production. Linked Electronics Co., Limited recommends never specifying unfilled VIP on any commercial assembly. If you genuinely cannot afford fill, redesign to avoid VIP.

Do filled-and-capped vias add electrical resistance?

Non-conductive epoxy fill carries no current. The current path is through the copper barrel surrounding the fill, plus the copper cap on top. For typical signal vias this is electrically identical to an unfilled plated via. Conductive copper fill provides slightly lower resistance and significantly better thermal conductivity — relevant for thermal pads and high-current power vias.

How do I tell my fabricator I want filled via-in-pad?

State it in your fabrication notes. The clearest wording is: "All vias in SMD pads to be filled with non-conductive epoxy and copper capped per IPC-4761 Type VI. Surface to be planarized flat with surrounding pad." Linked Electronics Co., Limited and most professional fabricators will produce to this specification without further clarification.

Can I have some vias filled and others left open on the same board?

Yes, but call it out clearly. The standard convention is to fill all vias inside SMD pads and leave the rest open or tented per normal practice. If you want exceptions, list them by net name or coordinate. Ambiguity here causes engineering questions and delays.

Does via-in-pad work with HASL surface finish?

Technically yes, but rarely makes sense. VIP designs are almost always fine-pitch BGA boards that require ENIG or similar flat finishes anyway. HASL's uneven surface negates much of the benefit of a flat capped via. For VIP, plan on ENIG, ENEPIG, immersion silver, or OSP as the appropriate finish.

What is the minimum order quantity for via-in-pad at Linked Electronics Co., Limited?

There is no quantity restriction tied to VIP at Linked Electronics Co., Limited. Single-piece prototypes through to series production are supported. The price reflects the added process cost rather than any volume threshold.

Will my assembly house need to do anything differently with VIP boards?

If the boards are properly filled, planarized, and capped, no special handling is required. Solder paste prints normally, the component places normally, reflow profile is the same. The assembly house may want to confirm with X-ray inspection on the first article to verify no voiding under BGAs, but this is standard practice for fine-pitch BGA assembly regardless of VIP.

Are stacked microvias the same as via-in-pad?

Related but distinct. Stacked microvias are an HDI construction technique where laser-drilled microvias on successive build-up layers sit directly on top of each other, connected by conductive copper fill. The top microvia of a stacked structure is typically also a via-in-pad if it sits inside an SMD pad. Stacked microvias require Type VII (conductive copper) fill on the lower vias to provide a solid plating surface for the upper layers.

Why Choose Linked Electronics Co., Limited for Via-in-Pad and HDI

Linked Electronics Co., Limited operates dedicated via-fill and planarization equipment as part of our HDI and fine-line production capability in Suining, Sichuan. We support non-conductive epoxy fill, conductive copper fill, and stacked microvia constructions across rigid FR4, HDI, and rigid-flex builds. Every filled via undergoes coupon microsection inspection for voids, and capping is verified by AOI before surface finishing.

Our engineering team reviews every Gerber set for via-in-pad compliance at quotation stage. If your design has VIP without explicit fill specification, we flag it and ask — we do not guess and ship boards that may fail in your assembly line. For projects where VIP is over-specified, we will suggest where dog-bone fanout could work and where it cannot, helping you balance cost against electrical and density requirements.

If you have a BGA-dense, HDI, or high-speed design that uses via-in-pad — or you are evaluating whether VIP is necessary for your project — send your Gerber files, stackup, and BOM to [email protected]. Linked Electronics Co., Limited will return engineering feedback and a manufacturable quote within one to two business days.

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