MSAP vs SAP vs Subtractive: How Fine-Line PCBs Are Made

For more than fifty years, the dominant method of forming PCB circuitry has been the subtractive process — coat copper, expose a pattern, etch away the rest. It is reliable, well understood, and adequate for line widths above roughly 75 microns. But as devices shrink and signal speeds climb, designers now routinely ask for traces in the 30–50 micron range, and on IC substrates as fine as 15 microns. Subtractive etching simply cannot get there.

The answer the industry has converged on is the additive family of processes — MSAP and full SAP. This guide explains what MSAP (Modified Semi-Additive Process) is, how it differs from both traditional subtractive and full SAP, and which applications require each. Linked Electronics Co., Limited supports MSAP-class fine-line work for HDI and substrate-like PCBs in our Suining facility.

The Problem with Subtractive Etching at Fine Pitch

The traditional subtractive workflow starts with a copper-clad laminate, typically half-ounce or one-ounce copper (18µm or 35µm thick). A dry film resist is laminated, exposed to UV through a photomask, and developed to leave resist on top of the copper that should remain as circuitry. The exposed copper is then etched away with a chemical spray, and the resist is stripped.

The problem is geometric. Etching is isotropic — it eats sideways as fast as it eats downward. By the time the etchant has gone all the way through 35 microns of copper vertically, it has also eaten roughly 35 microns horizontally on each side of every trace. The result is a trapezoidal cross-section: wide at the bottom, narrow at the top, with poorly controlled sidewalls. Designers compensate by drawing wider photoresist patterns than the target line width, but this compensation has limits. Below about 75µm line/space, undercut and over-etch make the process unrepeatable.

For mainstream FR4 boards with 0402 components and 0.5mm-pitch QFPs, subtractive remains the right choice — it is the lowest-cost process and Linked Electronics Co., Limited runs the vast majority of standard work this way. But for HDI inner layers, mSAP-class designs, and any board targeting line widths below 50µm, a different approach is needed.

What MSAP Actually Is

MSAP — Modified Semi-Additive Process — flips the logic of subtractive. Instead of plating thick copper everywhere and then etching most of it away, MSAP starts with an ultra-thin copper foil (typically 2–3µm), defines the pattern with photoresist, and then electroplates copper only in the trace areas. After the photoresist is stripped, a brief flash-etch removes the original ultra-thin copper from between the traces. Because that base copper is only a few microns thick, the flash etch is fast and lateral attack is minimal.

The result is traces with nearly vertical sidewalls, tightly controlled width, and excellent impedance uniformity — exactly what high-speed and high-density designs demand.

The MSAP Process Step by Step

1. Base material preparation — Start with a laminate featuring an ultra-thin copper foil (commonly 2µm or 3µm). This thin foil is the foundation that distinguishes MSAP from conventional processes.
2. Dry film lamination and imaging — A dry film photoresist is applied, then exposed through a fine-feature photomask (or by direct laser imaging) and developed. Where the resist is removed, the underlying copper is exposed; where it remains, the copper is protected.
3. Pattern electroplating — Copper is electroplated only on the exposed areas, building the trace up to the target final thickness (typically 12–25µm). Because plating grows upward from the base foil in a confined channel between resist walls, sidewalls remain steep.
4. Resist stripping — The dry film is chemically stripped away, exposing the original ultra-thin base copper between the now-plated traces.
5. Differential flash etch — A short, controlled etch removes the 2–3µm base copper from between traces. Because the plated traces are much thicker than the base copper, only a small fraction of the trace thickness is lost. The traces survive with crisp definition, while the spaces are cleared down to the dielectric.

At Linked Electronics Co., Limited, MSAP runs are produced on dedicated equipment with tight control of plating bath chemistry, current density, and etch dwell time — the three parameters that govern final line width tolerance.

How MSAP Compares to SAP and Subtractive

Three processes occupy three different segments of the fine-line spectrum. The table below summarises the key parameters:

Two observations from the table matter most for designers:

• MSAP occupies the practical middle ground. It delivers the fine-line capability that subtractive cannot, at meaningfully lower cost and higher yield than full SAP.
• Each process has a sweet spot. Choosing MSAP for a board that subtractive could handle wastes money; choosing subtractive for a board that needs MSAP causes yield collapse.

Why MSAP Matters for High-Speed and HDI Designs

Beyond raw line width, MSAP delivers three properties that high-frequency and high-density designs depend on:

Trapezoidal vs Rectangular Cross-Sections

Subtractive traces are wider at the base than the top. This asymmetry distorts the effective impedance and increases skin-effect losses at GHz frequencies, because high-frequency current concentrates on the surface where the geometry is least well controlled. MSAP traces are nearly rectangular, giving uniform current density and lower insertion loss — critical for 5G RF, PCIe Gen5/6, DDR5, and 112 Gbps SerDes links.

Tight Impedance Tolerance

Because the plating step adds material to a pre-defined channel rather than removing it from a continuous sheet, MSAP holds line width to roughly ±10% of target, versus ±20% or more for subtractive at the same nominal width. Tighter line width directly translates to tighter impedance — Linked Electronics Co., Limited routinely holds ±5% impedance on MSAP HDI work.

Dense Routing on HDI Inner Layers

HDI boards stack microvias on multiple build-up layers. Each layer can carry significantly more routing if line/space is halved from 75µm to 35µm. For a smartphone mainboard or AI accelerator module, MSAP can reduce overall layer count, shrink the board, or both — directly affecting product cost and form factor.

Typical Applications

MSAP is the right process for these classes of product:

• HDI PCBs for smartphones, wearables, and other miniaturised consumer electronics where component pitch and routing density both push subtractive to its limits.
• mSAP carrier boards used as interposers or system-in-package substrates.
• 5G radio modules and antenna boards where uniform trace geometry is critical for RF performance above 24 GHz.
• AI accelerator modules and high-end server boards with dense BGA fan-out and high-speed memory interfaces.
• Optical transceiver boards where 56G/112G PAM-4 SerDes lines require tight impedance and minimal loss.
• Automotive radar and ADAS boards running at 77 GHz where conventional subtractive cannot deliver the geometry control required.

Full SAP, by contrast, is reserved for IC substrates such as FC-BGA packaging with line widths well under 20µm. Most "fine-line PCB" requirements outside semiconductor packaging are served well by MSAP.

Design Guidelines for MSAP Boards

If you are designing for MSAP fabrication at Linked Electronics Co., Limited, a few practical guidelines will keep yield high and cost predictable:

• Target 35µm / 35µm line and space as a comfortable baseline. Tighter is possible but adds cost and reduces yield margin.
• Use 1/2 oz finished copper on signal layers. Heavier copper requires longer plating cycles and trades off geometry control.
• Avoid mixing very heavy copper planes with fine-line signal layers on the same physical sheet — process windows differ.
• Specify impedance targets explicitly in the fabrication notes; do not rely on the manufacturer inferring them from trace geometry.
• Provide stackup constraints if controlled impedance is critical — Linked Electronics Co., Limited will optimise dielectric thicknesses to hit your target while maintaining MSAP-friendly geometry.

Frequently Asked Questions

Is MSAP the same as mSAP?

Yes — "mSAP" and "MSAP" both refer to the Modified Semi-Additive Process. The lowercase "m" is common in semiconductor and substrate literature, while "MSAP" is more common in PCB industry materials. The process is identical.

What is the minimum line width that Linked Electronics Co., Limited can produce with MSAP?

Production minimum is 30µm line / 30µm space for standard MSAP work, with 20µm achievable on selected designs after engineering review. For features below 20µm the appropriate process is full SAP, which is used primarily on IC substrate work outside our standard PCB scope.

Does MSAP cost more than subtractive?

Yes. MSAP requires ultra-thin copper laminates (more expensive than standard CCL), additional pattern plating equipment, more precise photoimaging, and tighter process control. Depending on layer count and feature density, MSAP-class fabrication typically costs 30–80% more per square decimetre than subtractive at the same panel size. The cost is justified when the design genuinely requires the fine geometry — and not before.

Can MSAP and subtractive layers be combined in the same multilayer stackup?

Yes. A common HDI strategy is to use MSAP on the outermost build-up layers where fine fan-out and dense routing happen, and standard subtractive on the inner core layers where line widths are larger. Linked Electronics Co., Limited routinely produces hybrid stackups of this kind.

Does MSAP work on flex or rigid-flex substrates?

Yes, with caveats. MSAP can be applied to polyimide-based flex substrates, but base materials must be sourced with ultra-thin copper and dimensional stability becomes the dominant yield factor. For rigid-flex HDI work, consult the Linked Electronics Co., Limited engineering team early in the design phase.

How does MSAP affect lead time?

An MSAP layer adds a pattern-plate and flash-etch sequence beyond standard subtractive. For a typical HDI board, this adds roughly one to two days to fabrication lead time. For prototype-quantity orders at Linked Electronics Co., Limited, MSAP HDI builds typically ship in 10–14 working days.

What testing is performed on MSAP boards?

Every MSAP board at Linked Electronics Co., Limited is 100% electrically tested by flying probe or fixture, inspected by AOI for trace width compliance, and verified by cross-section coupon for impedance and copper thickness. X-ray inspection is performed on stacked microvia structures. Coupons are retained per IPC-6012 for traceability.

Why Choose Linked Electronics Co., Limited for MSAP and HDI

Linked Electronics Co., Limited operates a fine-line capable production line in our Suining, Sichuan facility, with dedicated pattern plating equipment and direct laser imaging (DLI) for sub-50 micron features. We support MSAP fabrication across rigid HDI builds, hybrid stackups, and selected rigid-flex constructions, with standard impedance tolerance of ±5% and trace width tolerance of ±10% of target.

For customers transitioning from conventional subtractive HDI to MSAP-class designs, our process engineers review your stackup, layer-by-layer line width requirements, and impedance targets, then return a feasibility assessment and quote within one to two business days. We support volumes from single-piece prototypes through to series production, and we maintain IPC Class 2 and IPC Class 3 process control as standard.

If you have a design that pushes beyond standard PCB geometry — whether for 5G RF, AI hardware, high-speed data, or any HDI application — send your Gerber files, stackup, and impedance requirements to [email protected]. The engineering team at Linked Electronics Co., Limited will confirm whether MSAP is the right process and provide a manufacturable quotation.

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