PCB Vias Explained: Through-Hole, Tented, Plugged, and Filled Vias Compared

Every PCB fabrication drawing includes via specifications, and most designers fill in that section by copying whatever the last project said. The result is boards with vias plugged that did not need plugging, vias tented that should have been filled, and — in the worst case — open vias inside BGA pads that drain solder during reflow and scrap the assembly.

Via terminology is genuinely confusing because two separate classification systems overlap: the structural types (through-hole, blind, buried, microvia) describe how the via connects layers, while the protection types (tented, plugged, filled, capped — standardised in IPC-4761) describe what happens to the via opening afterwards. This guide explains both systems, what each option costs, and how to write a via specification that your fabricator can build without guessing. Linked Electronics Co., Limited produces every via type discussed here as standard capability.

Part One: Structural Via Types

Plated Through-Hole Via (PTH)

The standard via. A hole drilled through the entire board, plated with copper along the barrel, connecting any combination of layers it passes through. Mechanically drilled, typically 0.2 mm to 0.5 mm finished diameter for signal vias and larger for power or thermal applications.

Through-hole vias are the cheapest interconnect and the right choice for the majority of boards. Their limitations appear at the extremes: on very thick boards they create aspect-ratio plating challenges, on high-speed designs the unused barrel becomes a resonant stub, and on dense designs they consume routing space on every layer whether or not a connection is needed there.

Blind Via

Connects an outer layer to one or more inner layers without passing through the entire board — visible from one side only. Blind vias can be mechanically drilled (controlled depth) or laser drilled. They free routing space on the layers they do not penetrate, at a cost premium over through-hole because the drilling and lamination sequence is more complex.

Buried Via

Connects inner layers only — invisible from both surfaces. Buried vias are drilled and plated in a sub-laminate before final lamination, which means the board requires sequential lamination cycles. They maximise outer-layer routing space but add the most fabrication cost and lead time of the conventional via family.

Microvia

Laser-drilled vias typically 0.1 mm to 0.15 mm in diameter, connecting only adjacent layers (one dielectric deep, per IPC-2226 the depth-to-diameter ratio should not exceed 1:1 for reliable plating). Microvias define HDI construction. They can be stacked (one on top of another through successive build-up layers, requiring copper filling) or staggered (offset from each other, cheaper). Their small size allows placement directly in component pads, and their short length gives them excellent high-frequency behaviour with negligible stub effect.

Part Two: Via Protection per IPC-4761

Once a via exists, the question becomes what happens to its openings. IPC-4761 standardises seven protection types; the four that matter for most designs are tenting, plugging, filling, and filling-with-capping.

Open Via (No Protection)

The via is left exposed — copper annular ring and open barrel visible on both sides. This is the cheapest option and perfectly acceptable for vias located away from solder pads on boards without special environmental requirements. Risks: solder mask chemistry or flux can enter the barrel during assembly, and exposed copper at the rim oxidises over time on OSP-finished boards.

Tented Via (IPC-4761 Type I)

Solder mask covers the via opening like a skin, without intentionally filling the barrel. Tenting is essentially free — the mask layer is simply not opened above the via. It prevents most flux and debris ingress, hides the via cosmetically, and stops solder balls from forming in the opening during wave soldering.

The limitation: tenting over larger vias (above approximately 0.3 mm) is unreliable. The mask film can rupture during curing or assembly, leaving a partially open hole with a ragged mask edge — worse than either a clean open via or a proper plug. Tent only small vias, and accept that some percentage of tents may break open.

Plugged Via (IPC-4761 Type IV)

The via barrel is intentionally filled with solder mask material from one or both sides. More reliable closure than tenting, modest cost adder. Plugging prevents solder migration through the via during wave soldering — the classic application is vias near through-hole component areas where wave solder would otherwise wick through to the top side.

Plugged vias are not flat. The mask plug typically has a dimple or slight protrusion, which makes plugging unsuitable for vias inside SMT pads. The plug material is also not hermetic at the level required for some vacuum or medical applications.

Filled Via (IPC-4761 Type VI — Filled and Capped, Non-Conductive)

The barrel is completely filled with non-conductive epoxy under vacuum or pressure, cured, planarized flat, and then plated over with a copper cap. The result is a via that looks and solders like a solid pad. This is the required construction for via-in-pad on SMT components — without fill and cap, solder drains down the barrel during reflow and the joint fails.

Copper-Filled Via (IPC-4761 Type VII — Filled and Capped, Conductive)

The barrel is filled with electroplated copper rather than epoxy. Higher cost and longer process time, but the solid copper column carries significant current, conducts heat efficiently, and provides a solid base for stacked microvia structures in HDI. Thermal vias under power components and stacked microvias both require Type VII.

The Decision Logic

For each via class in your design, ask three questions in order:

1. Is the via inside or touching an SMT pad? If yes — Type VI (epoxy fill + cap) minimum. If the via also carries high current or sits in a stacked microvia structure — Type VII (copper fill). Nothing less works; tenting or plugging inside a pad still drains solder or outgasses during reflow.
2. Is the via in a wave-soldered region or under a component body where solder migration matters? If yes — plugging (Type IV) is the economical choice.
3. Everything else? Open or tented, by cosmetic preference. Tent small vias if you want a cleaner look or debris protection; leave larger vias open.

The most common over-specification Linked Electronics Co., Limited sees is "fill and cap all vias" on boards where only the twenty vias under the BGA need it. Filling thousands of vias that could be tented adds meaningful cost for zero benefit. The most common under-specification is the reverse: nothing specified at all, with vias sitting inside QFN thermal pads. We flag both patterns at DFM review before fabrication.

How to Write the Specification

A clean via note on the fabrication drawing looks like this:

Vias in SMT pads: fill with non-conductive epoxy and copper cap per IPC-4761 Type VI, planarized flat. Thermal vias under U3, U7: copper fill per IPC-4761 Type VII. All other vias: tent with solder mask both sides (Type I); vias ≥0.4 mm may be left open.

Three sentences, zero ambiguity. Referencing the IPC-4761 type numbers removes any translation risk between your CAD terminology and the fabricator's process names.

Frequently Asked Questions

What is the difference between a tented via and a plugged via?

Tenting covers the via opening with solder mask film without intentionally filling the barrel — a skin over the hole. Plugging deliberately pushes mask material into the barrel to close it. Plugging is more reliable, slightly more expensive, and is the right choice when the closure actually matters (wave soldering, solder migration). Tenting is for cosmetic and light debris protection on small vias.

Can I put an open via inside a BGA pad if I keep the via small?

No. Even a 0.15 mm open via inside a pad drains molten solder during reflow. The defect rate may look tolerable on a prototype run and then collapse yield in production. Via-in-pad requires Type VI fill and cap, full stop. See our dedicated via-in-pad article for the complete treatment.

Do filled vias add electrical resistance?

Type VI (epoxy fill) does not change the current path — current flows through the plated barrel and the copper cap, same as an open via. Type VII (copper fill) actually lowers resistance and dramatically improves thermal conduction, which is why it is specified for thermal and high-current vias.

Why does my fabricator charge so much more for buried vias?

Buried vias require the inner-layer sub-stack to be drilled, plated, and inspected as a separate board, then laminated again with the outer layers. Each sequential lamination cycle adds press time, registration risk, and yield exposure. The cost is structural, not margin — if a design can achieve its routing with blind vias or through-holes plus careful planning, it usually should.

Are stacked microvias riskier than staggered?

Historically yes — stacked microvias concentrate thermal-cycling stress at the via-to-via interface, and IPC and several OEMs have published reliability concerns for 3+ stack heights. Staggered microvias spread the stress and are cheaper because lower vias do not need copper fill. Linked Electronics Co., Limited recommends staggered construction where routing density allows, and supports stacked structures with Type VII copper fill where the design requires them.

Does via protection affect impedance or signal integrity?

Negligibly, for the protection types themselves. The structural choices matter far more: through-hole stubs resonate at high frequency (see our back-drill article), while microvias are electrically near-invisible. Choose the structure for the signal; choose the protection for the assembly process.

What does Linked Electronics Co., Limited default to if I specify nothing?

Our incoming Gerber review flags any via inside an SMT pad and requests clarification rather than guessing — this is the one case where a wrong default scraps assemblies. For vias away from pads with no specification, the production default is tenting on vias below 0.3 mm and open above, which is the industry-typical safe choice. We state the assumption in the quotation so it is confirmed before fabrication.

Why Choose Linked Electronics Co., Limited for Via-Intensive Designs

Linked Electronics Co., Limited operates the full via-technology toolchain in our Suining facility: mechanical and laser drilling, controlled-depth blind via drilling, sequential lamination for buried vias, vacuum epoxy fill with planarization and copper capping, electroplated copper fill for Type VII and stacked microvia structures, and back-drilling for high-speed stub removal. Every via class on every incoming design is checked at DFM review — protection types verified against pad locations, aspect ratios verified against plating capability, and microvia structures verified against IPC-2226 depth ratios.

Whether your design is a simple double-sided board with tented vias or a 16-layer HDI build with stacked copper-filled microvias and selective Type VI via-in-pad, send your Gerber files and fabrication notes to [email protected]. Linked Electronics Co., Limited will return a via-by-via DFM review and manufacturable quote within one to two business days.

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